In the field of telecommunications, inter alia, digital systems are found which consist of several different application-specific integrated circuits which often cooperate in such a way that data has to be transmitted between the different circuits.
Each operation or change of state in an integrated circuit is initiated by a clock signal which can be generated in the circuit or can be input into the circuit from a clock disposed externally thereof. It is important that the parts of an integrated circuit which are interdependent or communicate with one another in some way are synchronized in terms of time. This synchronization is brought about by the clock signal which has to be distributed such that clock skew between clock signals in the different parts of the integrated circuit is minimized.
In the case of a digital system comprising a plurality of application-specific integrated circuits (ASIC), all the changes of state or operations in the system are controlled by clock signals which correspond to the circuits and are usually generated locally in connection with the respective circuit. In the same way as for different parts of an integrated circuit, it is important that different integrated circuits in a digital system are synchronized in terms of time if these circuits are arranged to exchange data. In the case of a system with a plurality of integrated circuits cooperating with one another there should therefore be correspondance between clock signals belonging to respective circuits. If this is not the case, clock skew can occur between clock signals in the different circuits in the system which leads to problems when data is exchanged therebetween.
U.S. Pat. No. 5,317,601 earlier disclosed a technique for feeding synchronized clock signals at different frequencies to a number of different parts of an integrated circuit. A number of synchronized clock signals are generated and distributed to the different parts of the circuit. In order to improve control of clock skew between these synchronized clock signals a synchronizing signal is also generated and is used as a reference for the clock signal. This synchronizing signal is distributed to the different parts of the integrated circuit. A synchronizing circuit adapted to each part of the integrated circuit receives the clock signals and the synchronizing signal.
The synchronizing circuit essentially comprises a multiplexer which through-connects the clock signal to the intended part of the integrated circuit under the control of the synchronizing signal. Each synchronizing circuit therefore synchronizes the respective clock signal according to the synchronizing signal.
The known synchronizing circuit consequently overcomes the problem of reducing skew between synchronizing signals to different parts of an integrated circuit. However the solution can be inadequate when data is exchanged between these parts.